Philip J. Koopman, Jr., CMU page. Many reports, studies, links. Compares: CISC, RISC, Stack systems; 2 & 3 stack systems. Excellent resource.

Designs, builds: single board computers (SBC), peripherals, embedded systems, PCB design/layout, high level programming (industry leaders in Forth), custom design work; large line of stock products: from full handheld computers to development packages. Since 1980.

Goal: dominate very low cost, low power, single core CPU market, and have the only ultra-high-end supercomputer on-a-chip system. Because the CPU core is so small, it is possible to put 1000s of cores and memory in one IC chip package.

Course on minimal processors: Guided Exploration of two FPGA-based CPU Designs, led by John Rible.

Small, fast stack-based processor for FPGAs. CPU prototyped and debugged in ANS Forth. A simple RTL-specific language extension provides discrete event simulation for structural model of CPU and allows concise architecture representation.

Free on-line book by Philip J. Koopman, Jr. Read it on-line, or download it in several formats including 700k zip file. Published in 1989, the first book to explore a new breed of stack computers led by introduction of Novix NC4016.

Minimal instruction set, small, low power 16-bit CPU optimized to run Forth on a Xilinx FPGA. When system is stable, VHDL source code for CPU and all other code will be released to make a full open source public domain CPU.

Makes IGNITE I ROSC (Removed Operand Set Computer), PSC1000 32-bit embedded shBoom-based microprocessor line, many ISDN interface products, sophisticated antenna/radar technologies.

Stack-based processors, 5-bit words, 25 instructions, 7000 transistors, 80 MIPS, 50 milliwatts, low cost; designed by Chuck Moore, creator of Forth programming language.

This page has references to Forth chips and stack machines in various technologies as well as Forth